Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
24 lines
663 B
C
24 lines
663 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
|
|
#ifndef __IP30_COMMON_H
|
|
#define __IP30_COMMON_H
|
|
|
|
/*
|
|
* Power Switch is wired via BaseIO BRIDGE slot #6.
|
|
*
|
|
* ACFail is wired via BaseIO BRIDGE slot #7.
|
|
*/
|
|
#define IP30_POWER_IRQ HEART_L2_INT_POWER_BTN
|
|
|
|
#define IP30_HEART_L0_IRQ (MIPS_CPU_IRQ_BASE + 2)
|
|
#define IP30_HEART_L1_IRQ (MIPS_CPU_IRQ_BASE + 3)
|
|
#define IP30_HEART_L2_IRQ (MIPS_CPU_IRQ_BASE + 4)
|
|
#define IP30_HEART_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 5)
|
|
#define IP30_HEART_ERR_IRQ (MIPS_CPU_IRQ_BASE + 6)
|
|
|
|
extern void __init ip30_install_ipi(void);
|
|
extern struct plat_smp_ops ip30_smp_ops;
|
|
extern void __init ip30_per_cpu_init(void);
|
|
|
|
#endif /* __IP30_COMMON_H */
|