Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
103 lines
2.4 KiB
C
103 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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*/
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#include <linux/kernel.h>
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#include <linux/printk.h>
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#include <linux/ptrace.h>
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#include <asm/reg.h>
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#include <asm/cacheflush.h>
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int machine_check_4xx(struct pt_regs *regs)
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{
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unsigned long reason = regs->esr;
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if (reason & ESR_IMCP) {
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printk("Instruction");
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mtspr(SPRN_ESR, reason & ~ESR_IMCP);
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} else
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printk("Data");
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printk(" machine check in kernel mode.\n");
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return 0;
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}
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int machine_check_440A(struct pt_regs *regs)
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{
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unsigned long reason = regs->esr;
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printk("Machine check in kernel mode.\n");
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if (reason & ESR_IMCP){
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printk("Instruction Synchronous Machine Check exception\n");
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mtspr(SPRN_ESR, reason & ~ESR_IMCP);
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}
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else {
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u32 mcsr = mfspr(SPRN_MCSR);
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if (mcsr & MCSR_IB)
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printk("Instruction Read PLB Error\n");
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if (mcsr & MCSR_DRB)
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printk("Data Read PLB Error\n");
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if (mcsr & MCSR_DWB)
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printk("Data Write PLB Error\n");
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if (mcsr & MCSR_TLBP)
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printk("TLB Parity Error\n");
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if (mcsr & MCSR_ICP){
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flush_instruction_cache();
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printk("I-Cache Parity Error\n");
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}
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if (mcsr & MCSR_DCSP)
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printk("D-Cache Search Parity Error\n");
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if (mcsr & MCSR_DCFP)
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printk("D-Cache Flush Parity Error\n");
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if (mcsr & MCSR_IMPE)
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printk("Machine Check exception is imprecise\n");
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/* Clear MCSR */
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mtspr(SPRN_MCSR, mcsr);
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}
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return 0;
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}
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#ifdef CONFIG_PPC_47x
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int machine_check_47x(struct pt_regs *regs)
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{
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unsigned long reason = regs->esr;
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u32 mcsr;
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printk(KERN_ERR "Machine check in kernel mode.\n");
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if (reason & ESR_IMCP) {
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printk(KERN_ERR "Instruction Synchronous Machine Check exception\n");
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mtspr(SPRN_ESR, reason & ~ESR_IMCP);
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return 0;
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}
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mcsr = mfspr(SPRN_MCSR);
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if (mcsr & MCSR_IB)
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printk(KERN_ERR "Instruction Read PLB Error\n");
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if (mcsr & MCSR_DRB)
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printk(KERN_ERR "Data Read PLB Error\n");
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if (mcsr & MCSR_DWB)
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printk(KERN_ERR "Data Write PLB Error\n");
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if (mcsr & MCSR_TLBP)
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printk(KERN_ERR "TLB Parity Error\n");
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if (mcsr & MCSR_ICP) {
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flush_instruction_cache();
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printk(KERN_ERR "I-Cache Parity Error\n");
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}
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if (mcsr & MCSR_DCSP)
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printk(KERN_ERR "D-Cache Search Parity Error\n");
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if (mcsr & PPC47x_MCSR_GPR)
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printk(KERN_ERR "GPR Parity Error\n");
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if (mcsr & PPC47x_MCSR_FPR)
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printk(KERN_ERR "FPR Parity Error\n");
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if (mcsr & PPC47x_MCSR_IPR)
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printk(KERN_ERR "Machine Check exception is imprecise\n");
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/* Clear MCSR */
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mtspr(SPRN_MCSR, mcsr);
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return 0;
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}
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#endif /* CONFIG_PPC_47x */
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