Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
43 lines
979 B
C
43 lines
979 B
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* linux/arch/sh/boards/renesas/sh7763rdp/irq.c
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*
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* Renesas Solutions SH7763RDP Support.
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*
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* Copyright (C) 2008 Renesas Solutions Corp.
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* Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
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*/
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <mach/sh7763rdp.h>
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#define INTC_BASE (0xFFD00000)
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#define INTC_INT2PRI7 (INTC_BASE+0x4001C)
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#define INTC_INT2MSKCR (INTC_BASE+0x4003C)
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#define INTC_INT2MSKCR1 (INTC_BASE+0x400D4)
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/*
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* Initialize IRQ setting
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*/
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void __init init_sh7763rdp_IRQ(void)
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{
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/* GPIO enabled */
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__raw_writel(1 << 25, INTC_INT2MSKCR);
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/* enable GPIO interrupts */
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__raw_writel((__raw_readl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000,
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INTC_INT2PRI7);
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/* USBH enabled */
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__raw_writel(1 << 17, INTC_INT2MSKCR1);
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/* GETHER enabled */
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__raw_writel(1 << 16, INTC_INT2MSKCR1);
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/* DMAC enabled */
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__raw_writel(1 << 8, INTC_INT2MSKCR);
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}
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