Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
19 lines
483 B
C
19 lines
483 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __UM_CACHE_H
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#define __UM_CACHE_H
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#if defined(CONFIG_UML_X86) && !defined(CONFIG_64BIT)
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# define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
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#elif defined(CONFIG_UML_X86) /* 64-bit */
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# define L1_CACHE_SHIFT 6 /* Should be 7 on Intel */
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#else
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/* XXX: this was taken from x86, now it's completely random. Luckily only
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* affects SMP padding. */
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# define L1_CACHE_SHIFT 5
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#endif
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#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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#endif
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