Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
82 lines
1.8 KiB
C
82 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2024, Ventana Micro Systems Inc
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* Author: Sunil V L <sunilvl@ventanamicro.com>
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*
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*/
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#include <linux/acpi.h>
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#include <acpi/processor.h>
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#include <linux/cpu_pm.h>
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#include <linux/cpuidle.h>
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#include <linux/suspend.h>
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#include <asm/cpuidle.h>
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#include <asm/sbi.h>
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#include <asm/suspend.h>
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#define RISCV_FFH_LPI_TYPE_MASK GENMASK_ULL(63, 60)
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#define RISCV_FFH_LPI_RSVD_MASK GENMASK_ULL(59, 32)
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#define RISCV_FFH_LPI_TYPE_SBI BIT_ULL(60)
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static int acpi_cpu_init_idle(unsigned int cpu)
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{
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int i;
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struct acpi_lpi_state *lpi;
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struct acpi_processor *pr = per_cpu(processors, cpu);
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if (unlikely(!pr || !pr->flags.has_lpi))
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return -EINVAL;
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if (!riscv_sbi_hsm_is_supported())
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return -ENODEV;
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if (pr->power.count <= 1)
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return -ENODEV;
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for (i = 1; i < pr->power.count; i++) {
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u32 state;
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lpi = &pr->power.lpi_states[i];
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/*
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* Validate Entry Method as per FFH spec.
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* bits[63:60] should be 0x1
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* bits[59:32] should be 0x0
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* bits[31:0] represent a SBI power_state
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*/
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if (((lpi->address & RISCV_FFH_LPI_TYPE_MASK) != RISCV_FFH_LPI_TYPE_SBI) ||
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(lpi->address & RISCV_FFH_LPI_RSVD_MASK)) {
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pr_warn("Invalid LPI entry method %#llx\n", lpi->address);
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return -EINVAL;
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}
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state = lpi->address;
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if (!riscv_sbi_suspend_state_is_valid(state)) {
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pr_warn("Invalid SBI power state %#x\n", state);
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return -EINVAL;
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}
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}
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return 0;
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}
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int acpi_processor_ffh_lpi_probe(unsigned int cpu)
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{
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return acpi_cpu_init_idle(cpu);
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}
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int acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
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{
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u32 state = lpi->address;
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if (state & SBI_HSM_SUSP_NON_RET_BIT)
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return CPU_PM_CPU_IDLE_ENTER_PARAM(riscv_sbi_hart_suspend,
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lpi->index,
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state);
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else
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return CPU_PM_CPU_IDLE_ENTER_RETENTION_PARAM(riscv_sbi_hart_suspend,
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lpi->index,
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state);
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}
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