Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
120 lines
3.1 KiB
C
120 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2020 Intel Corporation. All rights rsvd. */
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#ifndef _PERFMON_H_
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#define _PERFMON_H_
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <linux/sbitmap.h>
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#include <linux/dmaengine.h>
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#include <linux/percpu-rwsem.h>
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#include <linux/wait.h>
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#include <linux/cdev.h>
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#include <linux/uuid.h>
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#include <linux/idxd.h>
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#include <linux/perf_event.h>
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#include "registers.h"
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static inline struct idxd_pmu *event_to_pmu(struct perf_event *event)
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{
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struct idxd_pmu *idxd_pmu;
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struct pmu *pmu;
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pmu = event->pmu;
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idxd_pmu = container_of(pmu, struct idxd_pmu, pmu);
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return idxd_pmu;
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}
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static inline struct idxd_device *event_to_idxd(struct perf_event *event)
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{
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struct idxd_pmu *idxd_pmu;
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struct pmu *pmu;
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pmu = event->pmu;
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idxd_pmu = container_of(pmu, struct idxd_pmu, pmu);
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return idxd_pmu->idxd;
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}
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static inline struct idxd_device *pmu_to_idxd(struct pmu *pmu)
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{
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struct idxd_pmu *idxd_pmu;
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idxd_pmu = container_of(pmu, struct idxd_pmu, pmu);
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return idxd_pmu->idxd;
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}
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enum dsa_perf_events {
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DSA_PERF_EVENT_WQ = 0,
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DSA_PERF_EVENT_ENGINE,
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DSA_PERF_EVENT_ADDR_TRANS,
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DSA_PERF_EVENT_OP,
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DSA_PERF_EVENT_COMPL,
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DSA_PERF_EVENT_MAX,
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};
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enum filter_enc {
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FLT_WQ = 0,
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FLT_TC,
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FLT_PG_SZ,
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FLT_XFER_SZ,
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FLT_ENG,
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FLT_MAX,
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};
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#define CONFIG_RESET 0x0000000000000001
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#define CNTR_RESET 0x0000000000000002
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#define CNTR_ENABLE 0x0000000000000001
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#define INTR_OVFL 0x0000000000000002
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#define COUNTER_FREEZE 0x00000000FFFFFFFF
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#define COUNTER_UNFREEZE 0x0000000000000000
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#define OVERFLOW_SIZE 32
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#define CNTRCFG_ENABLE BIT(0)
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#define CNTRCFG_IRQ_OVERFLOW BIT(1)
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#define CNTRCFG_CATEGORY_SHIFT 8
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#define CNTRCFG_EVENT_SHIFT 32
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#define PERFMON_TABLE_OFFSET(_idxd) \
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({ \
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typeof(_idxd) __idxd = (_idxd); \
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((__idxd)->reg_base + (__idxd)->perfmon_offset); \
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})
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#define PERFMON_REG_OFFSET(idxd, offset) \
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(PERFMON_TABLE_OFFSET(idxd) + (offset))
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#define PERFCAP_REG(idxd) (PERFMON_REG_OFFSET(idxd, IDXD_PERFCAP_OFFSET))
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#define PERFRST_REG(idxd) (PERFMON_REG_OFFSET(idxd, IDXD_PERFRST_OFFSET))
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#define OVFSTATUS_REG(idxd) (PERFMON_REG_OFFSET(idxd, IDXD_OVFSTATUS_OFFSET))
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#define PERFFRZ_REG(idxd) (PERFMON_REG_OFFSET(idxd, IDXD_PERFFRZ_OFFSET))
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#define FLTCFG_REG(idxd, cntr, flt) \
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(PERFMON_REG_OFFSET(idxd, IDXD_FLTCFG_OFFSET) + ((cntr) * 32) + ((flt) * 4))
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#define CNTRCFG_REG(idxd, cntr) \
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(PERFMON_REG_OFFSET(idxd, IDXD_CNTRCFG_OFFSET) + ((cntr) * 8))
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#define CNTRDATA_REG(idxd, cntr) \
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(PERFMON_REG_OFFSET(idxd, IDXD_CNTRDATA_OFFSET) + ((cntr) * 8))
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#define CNTRCAP_REG(idxd, cntr) \
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(PERFMON_REG_OFFSET(idxd, IDXD_CNTRCAP_OFFSET) + ((cntr) * 8))
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#define EVNTCAP_REG(idxd, category) \
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(PERFMON_REG_OFFSET(idxd, IDXD_EVNTCAP_OFFSET) + ((category) * 8))
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#define DEFINE_PERFMON_FORMAT_ATTR(_name, _format) \
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static ssize_t __perfmon_idxd_##_name##_show(struct kobject *kobj, \
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struct kobj_attribute *attr, \
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char *page) \
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{ \
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BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \
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return sprintf(page, _format "\n"); \
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} \
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static struct kobj_attribute format_attr_idxd_##_name = \
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__ATTR(_name, 0444, __perfmon_idxd_##_name##_show, NULL)
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#endif
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