Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
80 lines
2.3 KiB
C
80 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2016 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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/*
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* Video Encoders
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* - ENCI : Interlace Video Encoder
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* - ENCI_DVI : Interlace Video Encoder for DVI/HDMI
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* - ENCP : Progressive Video Encoder
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*/
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#ifndef __MESON_VENC_H
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#define __MESON_VENC_H
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struct drm_display_mode;
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enum {
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MESON_VENC_MODE_NONE = 0,
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MESON_VENC_MODE_CVBS_PAL,
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MESON_VENC_MODE_CVBS_NTSC,
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MESON_VENC_MODE_HDMI,
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MESON_VENC_MODE_MIPI_DSI,
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};
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struct meson_cvbs_enci_mode {
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unsigned int mode_tag;
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unsigned int hso_begin; /* HSO begin position */
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unsigned int hso_end; /* HSO end position */
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unsigned int vso_even; /* VSO even line */
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unsigned int vso_odd; /* VSO odd line */
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unsigned int macv_max_amp; /* Macrovision max amplitude */
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unsigned int video_prog_mode;
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unsigned int video_mode;
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unsigned int sch_adjust;
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unsigned int yc_delay;
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unsigned int pixel_start;
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unsigned int pixel_end;
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unsigned int top_field_line_start;
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unsigned int top_field_line_end;
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unsigned int bottom_field_line_start;
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unsigned int bottom_field_line_end;
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unsigned int video_saturation;
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unsigned int video_contrast;
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unsigned int video_brightness;
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unsigned int video_hue;
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unsigned int analog_sync_adj;
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};
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/* LCD Encoder gamma setup */
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void meson_encl_load_gamma(struct meson_drm *priv);
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/* HDMI Clock parameters */
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enum drm_mode_status
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meson_venc_hdmi_supported_mode(const struct drm_display_mode *mode);
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bool meson_venc_hdmi_supported_vic(int vic);
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bool meson_venc_hdmi_venc_repeat(int vic);
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/* CVBS Timings and Parameters */
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extern struct meson_cvbs_enci_mode meson_cvbs_enci_pal;
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extern struct meson_cvbs_enci_mode meson_cvbs_enci_ntsc;
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void meson_venci_cvbs_mode_set(struct meson_drm *priv,
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struct meson_cvbs_enci_mode *mode);
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void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic,
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unsigned int ycrcb_map,
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bool yuv420_mode,
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const struct drm_display_mode *mode);
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void meson_venc_mipi_dsi_mode_set(struct meson_drm *priv,
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const struct drm_display_mode *mode);
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unsigned int meson_venci_get_field(struct meson_drm *priv);
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void meson_venc_enable_vsync(struct meson_drm *priv);
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void meson_venc_disable_vsync(struct meson_drm *priv);
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void meson_venc_init(struct meson_drm *priv);
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#endif /* __MESON_VENC_H */
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