Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
35 lines
1.6 KiB
Plaintext
35 lines
1.6 KiB
Plaintext
config CAN_CTUCANFD
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tristate "CTU CAN-FD IP core" if COMPILE_TEST
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help
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This driver adds support for the CTU CAN FD open-source IP core.
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More documentation and core sources at project page
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(https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core).
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The core integration to Xilinx Zynq system as platform driver
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is available (https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top).
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Implementation on Intel FPGA-based PCI Express board is available
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from project (https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd) and
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on Intel SoC from project (https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd).
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Guidepost CTU FEE CAN bus projects page https://canbus.pages.fel.cvut.cz/ .
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config CAN_CTUCANFD_PCI
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tristate "CTU CAN-FD IP core PCI/PCIe driver"
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depends on PCI
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select CAN_CTUCANFD
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help
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This driver adds PCI/PCIe support for CTU CAN-FD IP core.
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The project providing FPGA design for Intel EP4CGX15 based DB4CGX15
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PCIe board with PiKRON.com designed transceiver riser shield is available
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at https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd .
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config CAN_CTUCANFD_PLATFORM
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tristate "CTU CAN-FD IP core platform (FPGA, SoC) driver"
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depends on HAS_IOMEM && OF
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select CAN_CTUCANFD
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help
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The core has been tested together with OpenCores SJA1000
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modified to be CAN FD frames tolerant on MicroZed Zynq based
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MZ_APO education kits designed by Petr Porazil from PiKRON.com
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company. FPGA design https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top.
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The kit description at the Computer Architectures course pages
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https://cw.fel.cvut.cz/wiki/courses/b35apo/documentation/mz_apo/start .
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