Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
49 lines
1.4 KiB
C
49 lines
1.4 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2020, The Linux Foundation. All rights reserved.
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* Copyright (c) 2023, Linaro Limited
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8450_H
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#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8450_H
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/* Clocks */
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#define GPU_CC_AHB_CLK 0
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#define GPU_CC_CRC_AHB_CLK 1
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#define GPU_CC_CX_APB_CLK 2
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#define GPU_CC_CX_FF_CLK 3
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#define GPU_CC_CX_GMU_CLK 4
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#define GPU_CC_CX_SNOC_DVM_CLK 5
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#define GPU_CC_CXO_AON_CLK 6
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#define GPU_CC_CXO_CLK 7
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#define GPU_CC_DEMET_CLK 8
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#define GPU_CC_DEMET_DIV_CLK_SRC 9
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#define GPU_CC_FF_CLK_SRC 10
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#define GPU_CC_FREQ_MEASURE_CLK 11
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#define GPU_CC_GMU_CLK_SRC 12
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#define GPU_CC_GX_FF_CLK 13
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#define GPU_CC_GX_GFX3D_CLK 14
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#define GPU_CC_GX_GFX3D_RDVM_CLK 15
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#define GPU_CC_GX_GMU_CLK 16
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#define GPU_CC_GX_VSENSE_CLK 17
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#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 18
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#define GPU_CC_HUB_AHB_DIV_CLK_SRC 19
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#define GPU_CC_HUB_AON_CLK 20
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#define GPU_CC_HUB_CLK_SRC 21
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#define GPU_CC_HUB_CX_INT_CLK 22
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#define GPU_CC_HUB_CX_INT_DIV_CLK_SRC 23
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#define GPU_CC_MEMNOC_GFX_CLK 24
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#define GPU_CC_MND1X_0_GFX3D_CLK 25
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#define GPU_CC_MND1X_1_GFX3D_CLK 26
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#define GPU_CC_PLL0 27
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#define GPU_CC_PLL1 28
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#define GPU_CC_SLEEP_CLK 29
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#define GPU_CC_XO_CLK_SRC 30
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#define GPU_CC_XO_DIV_CLK_SRC 31
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/* GDSCs */
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#define GPU_GX_GDSC 0
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#define GPU_CX_GDSC 1
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#endif
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