Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
23 lines
670 B
C
23 lines
670 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: Yong Liang <yong.liang@mediatek.com>
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*/
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#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT2712
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#define _DT_BINDINGS_RESET_CONTROLLER_MT2712
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#define MT2712_TOPRGU_INFRA_SW_RST 0
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#define MT2712_TOPRGU_MM_SW_RST 1
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#define MT2712_TOPRGU_MFG_SW_RST 2
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#define MT2712_TOPRGU_VENC_SW_RST 3
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#define MT2712_TOPRGU_VDEC_SW_RST 4
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#define MT2712_TOPRGU_IMG_SW_RST 5
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#define MT2712_TOPRGU_INFRA_AO_SW_RST 8
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#define MT2712_TOPRGU_USB_SW_RST 9
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#define MT2712_TOPRGU_APMIXED_SW_RST 10
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#define MT2712_TOPRGU_SW_RST_NUM 11
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#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT2712 */
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