Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
43 lines
907 B
C
43 lines
907 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
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*/
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#ifndef DT_RESET_OXSEMI_OX810SE_H
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#define DT_RESET_OXSEMI_OX810SE_H
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#define RESET_ARM 0
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#define RESET_COPRO 1
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/* Reserved 2 */
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/* Reserved 3 */
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#define RESET_USBHS 4
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#define RESET_USBHSPHY 5
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#define RESET_MAC 6
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#define RESET_PCI 7
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#define RESET_DMA 8
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#define RESET_DPE 9
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#define RESET_DDR 10
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#define RESET_SATA 11
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#define RESET_SATA_LINK 12
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#define RESET_SATA_PHY 13
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/* Reserved 14 */
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#define RESET_NAND 15
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#define RESET_GPIO 16
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#define RESET_UART1 17
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#define RESET_UART2 18
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#define RESET_MISC 19
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#define RESET_I2S 20
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#define RESET_AHB_MON 21
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#define RESET_UART3 22
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#define RESET_UART4 23
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#define RESET_SGDMA 24
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/* Reserved 25 */
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/* Reserved 26 */
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/* Reserved 27 */
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/* Reserved 28 */
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/* Reserved 29 */
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/* Reserved 30 */
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#define RESET_BUS 31
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#endif /* DT_RESET_OXSEMI_OX810SE_H */
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