Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
406 lines
11 KiB
C
406 lines
11 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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/*
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* Copyright (c) 2025 Rockchip Electronics Co., Ltd.
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* Author: Elaine Zhang <zhangqing@rock-chips.com>
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*/
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#ifndef _DT_BINDINGS_RESET_ROCKCHIP_RV1126B_H
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#define _DT_BINDINGS_RESET_ROCKCHIP_RV1126B_H
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/* ==========================list all of reset fields id=========================== */
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/* TOPCRU-->SOFTRST_CON00 */
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/* TOPCRU-->SOFTRST_CON15 */
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#define SRST_P_CRU 0
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#define SRST_P_CRU_BIU 1
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/* BUSCRU-->SOFTRST_CON00 */
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#define SRST_A_TOP_BIU 2
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#define SRST_A_RKCE_BIU 3
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#define SRST_A_BUS_BIU 4
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#define SRST_H_BUS_BIU 5
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#define SRST_P_BUS_BIU 6
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#define SRST_P_CRU_BUS 7
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#define SRST_P_SYS_GRF 8
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#define SRST_H_BOOTROM 9
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#define SRST_A_GIC400 10
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#define SRST_A_SPINLOCK 11
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#define SRST_P_WDT_NS 12
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#define SRST_T_WDT_NS 13
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/* BUSCRU-->SOFTRST_CON01 */
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#define SRST_P_WDT_HPMCU 14
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#define SRST_T_WDT_HPMCU 15
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#define SRST_H_CACHE 16
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#define SRST_P_HPMCU_MAILBOX 17
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#define SRST_P_HPMCU_INTMUX 18
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#define SRST_HPMCU_FULL_CLUSTER 19
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#define SRST_HPMCU_PWUP 20
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#define SRST_HPMCU_ONLY_CORE 21
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#define SRST_T_HPMCU_JTAG 22
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#define SRST_P_RKDMA 23
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#define SRST_A_RKDMA 24
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/* BUSCRU-->SOFTRST_CON02 */
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#define SRST_P_DCF 25
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#define SRST_A_DCF 26
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#define SRST_H_RGA 27
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#define SRST_A_RGA 28
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#define SRST_CORE_RGA 29
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#define SRST_P_TIMER 30
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#define SRST_TIMER0 31
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#define SRST_TIMER1 32
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#define SRST_TIMER2 33
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#define SRST_TIMER3 34
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#define SRST_TIMER4 35
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#define SRST_TIMER5 36
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#define SRST_A_RKCE 37
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#define SRST_PKA_RKCE 38
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#define SRST_H_RKRNG_S 39
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#define SRST_H_RKRNG_NS 40
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/* BUSCRU-->SOFTRST_CON03 */
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#define SRST_P_I2C0 41
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#define SRST_I2C0 42
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#define SRST_P_I2C1 43
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#define SRST_I2C1 44
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#define SRST_P_I2C3 45
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#define SRST_I2C3 46
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#define SRST_P_I2C4 47
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#define SRST_I2C4 48
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#define SRST_P_I2C5 49
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#define SRST_I2C5 50
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#define SRST_P_SPI0 51
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#define SRST_SPI0 52
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#define SRST_P_SPI1 53
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#define SRST_SPI1 54
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/* BUSCRU-->SOFTRST_CON04 */
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#define SRST_P_PWM0 55
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#define SRST_PWM0 56
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#define SRST_P_PWM2 57
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#define SRST_PWM2 58
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#define SRST_P_PWM3 59
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#define SRST_PWM3 60
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/* BUSCRU-->SOFTRST_CON05 */
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#define SRST_P_UART1 61
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#define SRST_S_UART1 62
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#define SRST_P_UART2 63
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#define SRST_S_UART2 64
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#define SRST_P_UART3 65
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#define SRST_S_UART3 66
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#define SRST_P_UART4 67
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#define SRST_S_UART4 68
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#define SRST_P_UART5 69
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#define SRST_S_UART5 70
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#define SRST_P_UART6 71
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#define SRST_S_UART6 72
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#define SRST_P_UART7 73
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#define SRST_S_UART7 74
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/* BUSCRU-->SOFTRST_CON06 */
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#define SRST_P_TSADC 75
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#define SRST_TSADC 76
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#define SRST_H_SAI0 77
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#define SRST_M_SAI0 78
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#define SRST_H_SAI1 79
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#define SRST_M_SAI1 80
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#define SRST_H_SAI2 81
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#define SRST_M_SAI2 82
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#define SRST_H_RKDSM 83
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#define SRST_M_RKDSM 84
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#define SRST_H_PDM 85
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#define SRST_M_PDM 86
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#define SRST_PDM 87
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/* BUSCRU-->SOFTRST_CON07 */
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#define SRST_H_ASRC0 88
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#define SRST_ASRC0 89
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#define SRST_H_ASRC1 90
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#define SRST_ASRC1 91
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#define SRST_P_AUDIO_ADC_BUS 92
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#define SRST_M_AUDIO_ADC_BUS 93
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#define SRST_P_RKCE 94
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#define SRST_H_NS_RKCE 95
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#define SRST_P_OTPC_NS 96
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#define SRST_SBPI_OTPC_NS 97
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#define SRST_USER_OTPC_NS 98
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#define SRST_OTPC_ARB 99
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#define SRST_P_OTP_MASK 100
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/* PERICRU-->SOFTRST_CON00 */
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#define SRST_A_PERI_BIU 101
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#define SRST_P_PERI_BIU 102
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#define SRST_P_RTC_BIU 103
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#define SRST_P_CRU_PERI 104
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#define SRST_P_PERI_GRF 105
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#define SRST_P_GPIO1 106
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#define SRST_DB_GPIO1 107
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#define SRST_P_IOC_VCCIO1 108
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#define SRST_A_USB3OTG 109
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#define SRST_H_USB2HOST 110
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#define SRST_H_ARB_USB2HOST 111
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#define SRST_P_RTC_TEST 112
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/* PERICRU-->SOFTRST_CON01 */
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#define SRST_H_EMMC 113
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#define SRST_H_FSPI0 114
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#define SRST_H_XIP_FSPI0 115
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#define SRST_S_2X_FSPI0 116
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#define SRST_UTMI_USB2HOST 117
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#define SRST_REF_PIPEPHY 118
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#define SRST_P_PIPEPHY 119
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#define SRST_P_PIPEPHY_GRF 120
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#define SRST_P_USB2PHY 121
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#define SRST_POR_USB2PHY 122
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#define SRST_OTG_USB2PHY 123
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#define SRST_HOST_USB2PHY 124
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/* CORECRU-->SOFTRST_CON00 */
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#define SRST_REF_PVTPLL_CORE 125
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#define SRST_NCOREPORESET0 126
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#define SRST_NCORESET0 127
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#define SRST_NCOREPORESET1 128
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#define SRST_NCORESET1 129
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#define SRST_NCOREPORESET2 130
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#define SRST_NCORESET2 131
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#define SRST_NCOREPORESET3 132
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#define SRST_NCORESET3 133
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#define SRST_NDBGRESET 134
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#define SRST_NL2RESET 135
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/* CORECRU-->SOFTRST_CON01 */
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#define SRST_A_CORE_BIU 136
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#define SRST_P_CORE_BIU 137
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#define SRST_H_CORE_BIU 138
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#define SRST_P_DBG 139
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#define SRST_POT_DBG 140
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#define SRST_NT_DBG 141
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#define SRST_P_CORE_PVTPLL 142
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#define SRST_P_CRU_CORE 143
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#define SRST_P_CORE_GRF 144
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#define SRST_P_DFT2APB 145
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/* PMUCRU-->SOFTRST_CON00 */
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#define SRST_H_PMU_BIU 146
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#define SRST_P_PMU_GPIO0 147
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#define SRST_DB_PMU_GPIO0 148
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#define SRST_P_PMU_HP_TIMER 149
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#define SRST_PMU_HP_TIMER 150
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#define SRST_PMU_32K_HP_TIMER 151
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/* PMUCRU-->SOFTRST_CON01 */
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#define SRST_P_PWM1 152
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#define SRST_PWM1 153
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#define SRST_P_I2C2 154
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#define SRST_I2C2 155
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#define SRST_P_UART0 156
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#define SRST_S_UART0 157
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/* PMUCRU-->SOFTRST_CON02 */
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#define SRST_P_RCOSC_CTRL 158
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#define SRST_REF_RCOSC_CTRL 159
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#define SRST_P_IOC_PMUIO0 160
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#define SRST_P_CRU_PMU 161
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#define SRST_P_PMU_GRF 162
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#define SRST_PREROLL 163
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#define SRST_PREROLL_32K 164
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#define SRST_H_PMU_SRAM 165
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/* PMUCRU-->SOFTRST_CON03 */
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#define SRST_P_WDT_LPMCU 166
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#define SRST_T_WDT_LPMCU 167
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#define SRST_LPMCU_FULL_CLUSTER 168
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#define SRST_LPMCU_PWUP 169
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#define SRST_LPMCU_ONLY_CORE 170
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#define SRST_T_LPMCU_JTAG 171
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#define SRST_P_LPMCU_MAILBOX 172
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/* PMU1CRU-->SOFTRST_CON00 */
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#define SRST_P_SPI2AHB 173
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#define SRST_H_SPI2AHB 174
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#define SRST_H_FSPI1 175
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#define SRST_H_XIP_FSPI1 176
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#define SRST_S_1X_FSPI1 177
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#define SRST_P_IOC_PMUIO1 178
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#define SRST_P_CRU_PMU1 179
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#define SRST_P_AUDIO_ADC_PMU 180
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#define SRST_M_AUDIO_ADC_PMU 181
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#define SRST_H_PMU1_BIU 182
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/* PMU1CRU-->SOFTRST_CON01 */
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#define SRST_P_LPDMA 183
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#define SRST_A_LPDMA 184
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#define SRST_H_LPSAI 185
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#define SRST_M_LPSAI 186
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#define SRST_P_AOA_TDD 187
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#define SRST_P_AOA_FE 188
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#define SRST_P_AOA_AAD 189
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#define SRST_P_AOA_APB 190
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#define SRST_P_AOA_SRAM 191
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/* DDRCRU-->SOFTRST_CON00 */
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#define SRST_P_DDR_BIU 192
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#define SRST_P_DDRC 193
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#define SRST_P_DDRMON 194
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#define SRST_TIMER_DDRMON 195
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#define SRST_P_DFICTRL 196
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#define SRST_P_DDR_GRF 197
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#define SRST_P_CRU_DDR 198
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#define SRST_P_DDRPHY 199
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#define SRST_P_DMA2DDR 200
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/* SUBDDRCRU-->SOFTRST_CON00 */
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#define SRST_A_SYSMEM_BIU 201
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#define SRST_A_SYSMEM 202
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#define SRST_A_DDR_BIU 203
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#define SRST_A_DDRSCH0_CPU 204
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#define SRST_A_DDRSCH1_NPU 205
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#define SRST_A_DDRSCH2_POE 206
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#define SRST_A_DDRSCH3_VI 207
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#define SRST_CORE_DDRC 208
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#define SRST_DDRMON 209
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#define SRST_DFICTRL 210
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#define SRST_RS 211
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#define SRST_A_DMA2DDR 212
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#define SRST_DDRPHY 213
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/* VICRU-->SOFTRST_CON00 */
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#define SRST_REF_PVTPLL_ISP 214
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#define SRST_A_GMAC_BIU 215
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#define SRST_A_VI_BIU 216
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#define SRST_H_VI_BIU 217
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#define SRST_P_VI_BIU 218
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#define SRST_P_CRU_VI 219
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#define SRST_P_VI_GRF 220
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#define SRST_P_VI_PVTPLL 221
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#define SRST_P_DSMC 222
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#define SRST_A_DSMC 223
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#define SRST_H_CAN0 224
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#define SRST_CAN0 225
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#define SRST_H_CAN1 226
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#define SRST_CAN1 227
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/* VICRU-->SOFTRST_CON01 */
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#define SRST_P_GPIO2 228
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#define SRST_DB_GPIO2 229
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#define SRST_P_GPIO4 230
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#define SRST_DB_GPIO4 231
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#define SRST_P_GPIO5 232
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#define SRST_DB_GPIO5 233
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#define SRST_P_GPIO6 234
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#define SRST_DB_GPIO6 235
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#define SRST_P_GPIO7 236
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#define SRST_DB_GPIO7 237
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#define SRST_P_IOC_VCCIO2 238
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#define SRST_P_IOC_VCCIO4 239
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#define SRST_P_IOC_VCCIO5 240
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#define SRST_P_IOC_VCCIO6 241
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#define SRST_P_IOC_VCCIO7 242
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/* VICRU-->SOFTRST_CON02 */
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#define SRST_CORE_ISP 243
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#define SRST_H_VICAP 244
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#define SRST_A_VICAP 245
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#define SRST_D_VICAP 246
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#define SRST_ISP0_VICAP 247
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#define SRST_CORE_VPSS 248
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#define SRST_CORE_VPSL 249
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#define SRST_P_CSI2HOST0 250
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#define SRST_P_CSI2HOST1 251
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#define SRST_P_CSI2HOST2 252
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#define SRST_P_CSI2HOST3 253
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#define SRST_H_SDMMC0 254
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#define SRST_A_GMAC 255
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#define SRST_P_CSIPHY0 256
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#define SRST_P_CSIPHY1 257
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/* VICRU-->SOFTRST_CON03 */
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#define SRST_P_MACPHY 258
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#define SRST_MACPHY 259
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#define SRST_P_SARADC1 260
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#define SRST_SARADC1 261
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#define SRST_P_SARADC2 262
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#define SRST_SARADC2 263
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/* VEPUCRU-->SOFTRST_CON00 */
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#define SRST_REF_PVTPLL_VEPU 264
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#define SRST_A_VEPU_BIU 265
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#define SRST_H_VEPU_BIU 266
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#define SRST_P_VEPU_BIU 267
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#define SRST_P_CRU_VEPU 268
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#define SRST_P_VEPU_GRF 269
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#define SRST_P_GPIO3 270
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#define SRST_DB_GPIO3 271
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#define SRST_P_IOC_VCCIO3 272
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#define SRST_P_SARADC0 273
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#define SRST_SARADC0 274
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#define SRST_H_SDMMC1 275
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/* VEPUCRU-->SOFTRST_CON01 */
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#define SRST_P_VEPU_PVTPLL 276
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#define SRST_H_VEPU 277
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#define SRST_A_VEPU 278
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#define SRST_CORE_VEPU 279
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/* NPUCRU-->SOFTRST_CON00 */
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#define SRST_REF_PVTPLL_NPU 280
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#define SRST_A_NPU_BIU 281
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#define SRST_H_NPU_BIU 282
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#define SRST_P_NPU_BIU 283
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#define SRST_P_CRU_NPU 284
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#define SRST_P_NPU_GRF 285
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#define SRST_P_NPU_PVTPLL 286
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#define SRST_H_RKNN 287
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#define SRST_A_RKNN 288
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/* VDOCRU-->SOFTRST_CON00 */
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#define SRST_A_RKVDEC_BIU 289
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#define SRST_A_VDO_BIU 290
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#define SRST_H_VDO_BIU 291
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#define SRST_P_VDO_BIU 292
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#define SRST_P_CRU_VDO 293
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#define SRST_P_VDO_GRF 294
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#define SRST_A_RKVDEC 295
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#define SRST_H_RKVDEC 296
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#define SRST_HEVC_CA_RKVDEC 297
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#define SRST_A_VOP 298
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#define SRST_H_VOP 299
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#define SRST_D_VOP 300
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#define SRST_A_OOC 301
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#define SRST_H_OOC 302
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#define SRST_D_OOC 303
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/* VDOCRU-->SOFTRST_CON01 */
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#define SRST_H_RKJPEG 304
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#define SRST_A_RKJPEG 305
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#define SRST_A_RKMMU_DECOM 306
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#define SRST_H_RKMMU_DECOM 307
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#define SRST_D_DECOM 308
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#define SRST_A_DECOM 309
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#define SRST_P_DECOM 310
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#define SRST_P_MIPI_DSI 311
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#define SRST_P_DSIPHY 312
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/* VCPCRU-->SOFTRST_CON00 */
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#define SRST_REF_PVTPLL_VCP 313
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#define SRST_A_VCP_BIU 314
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#define SRST_H_VCP_BIU 315
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#define SRST_P_VCP_BIU 316
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#define SRST_P_CRU_VCP 317
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#define SRST_P_VCP_GRF 318
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#define SRST_P_VCP_PVTPLL 319
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#define SRST_A_AISP_BIU 320
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#define SRST_H_AISP_BIU 321
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#define SRST_CORE_AISP 322
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/* VCPCRU-->SOFTRST_CON01 */
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#define SRST_H_FEC 323
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#define SRST_A_FEC 324
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#define SRST_CORE_FEC 325
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#define SRST_H_AVSP 326
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#define SRST_A_AVSP 327
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#endif
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