Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
45 lines
913 B
C
45 lines
913 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copied from the kernel sources:
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*
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* Copyright IBM Corp. 1999, 2009
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*
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
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*/
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#ifndef __TOOLS_LINUX_ASM_BARRIER_H
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#define __TOOLS_LINUX_ASM_BARRIER_H
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/*
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* Force strict CPU ordering.
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* And yes, this is required on UP too when we're talking
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* to devices.
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*/
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#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
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/* Fast-BCR without checkpoint synchronization */
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#define __ASM_BARRIER "bcr 14,0\n"
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#else
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#define __ASM_BARRIER "bcr 15,0\n"
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#endif
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#define mb() do { asm volatile(__ASM_BARRIER : : : "memory"); } while (0)
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#define rmb() mb()
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#define wmb() mb()
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#define smp_store_release(p, v) \
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do { \
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barrier(); \
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WRITE_ONCE(*p, v); \
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} while (0)
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#define smp_load_acquire(p) \
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({ \
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typeof(*p) ___p1 = READ_ONCE(*p); \
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barrier(); \
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___p1; \
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})
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#endif /* __TOOLS_LIB_ASM_BARRIER_H */
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