Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
46 lines
1.6 KiB
C
46 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2005 Ivan Kokshaysky
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* Copyright (C) SAN People
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*
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* System Timer (ST) - System peripherals registers.
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* Based on AT91RM9200 datasheet revision E.
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*/
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#ifndef _LINUX_MFD_SYSCON_ATMEL_ST_H
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#define _LINUX_MFD_SYSCON_ATMEL_ST_H
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#include <linux/bitops.h>
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#define AT91_ST_CR 0x00 /* Control Register */
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#define AT91_ST_WDRST BIT(0) /* Watchdog Timer Restart */
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#define AT91_ST_PIMR 0x04 /* Period Interval Mode Register */
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#define AT91_ST_PIV 0xffff /* Period Interval Value */
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#define AT91_ST_WDMR 0x08 /* Watchdog Mode Register */
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#define AT91_ST_WDV 0xffff /* Watchdog Counter Value */
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#define AT91_ST_RSTEN BIT(16) /* Reset Enable */
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#define AT91_ST_EXTEN BIT(17) /* External Signal Assertion Enable */
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#define AT91_ST_RTMR 0x0c /* Real-time Mode Register */
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#define AT91_ST_RTPRES 0xffff /* Real-time Prescalar Value */
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#define AT91_ST_SR 0x10 /* Status Register */
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#define AT91_ST_PITS BIT(0) /* Period Interval Timer Status */
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#define AT91_ST_WDOVF BIT(1) /* Watchdog Overflow */
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#define AT91_ST_RTTINC BIT(2) /* Real-time Timer Increment */
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#define AT91_ST_ALMS BIT(3) /* Alarm Status */
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#define AT91_ST_IER 0x14 /* Interrupt Enable Register */
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#define AT91_ST_IDR 0x18 /* Interrupt Disable Register */
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#define AT91_ST_IMR 0x1c /* Interrupt Mask Register */
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#define AT91_ST_RTAR 0x20 /* Real-time Alarm Register */
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#define AT91_ST_ALMV 0xfffff /* Alarm Value */
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#define AT91_ST_CRTR 0x24 /* Current Real-time Register */
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#define AT91_ST_CRTV 0xfffff /* Current Real-Time Value */
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#endif /* _LINUX_MFD_SYSCON_ATMEL_ST_H */
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