Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
46 lines
931 B
C
46 lines
931 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* OpenRISC Linux
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*
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* Linux architectural port borrowing liberally from similar works of
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* others. All original copyrights apply as per the original source
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* declaration.
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*
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* OpenRISC implementation:
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* Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
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* Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
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* et al.
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*/
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#ifndef __ASM_OPENRISC_CPUINFO_H
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#define __ASM_OPENRISC_CPUINFO_H
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#include <asm/spr.h>
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#include <asm/spr_defs.h>
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struct cache_desc {
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u32 size;
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u32 sets;
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u32 block_size;
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u32 ways;
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};
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struct cpuinfo_or1k {
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u32 clock_frequency;
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struct cache_desc icache;
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struct cache_desc dcache;
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u16 coreid;
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};
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extern struct cpuinfo_or1k cpuinfo_or1k[NR_CPUS];
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extern void setup_cpuinfo(void);
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/*
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* Check if the cache component exists.
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*/
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extern bool cpu_cache_is_present(const unsigned int cache_type);
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#endif /* __ASM_OPENRISC_CPUINFO_H */
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