Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
32 lines
978 B
Plaintext
32 lines
978 B
Plaintext
# SPDX-License-Identifier: GPL-2.0
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config XILINX_VCU
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tristate "Xilinx VCU logicoreIP Init"
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depends on HAS_IOMEM
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select REGMAP_MMIO
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help
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Provides the driver to enable and disable the isolation between the
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processing system and programmable logic part by using the logicoreIP
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register set. This driver also configures the frequency based on the
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clock information from the logicoreIP register set.
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If you say yes here you get support for the logicoreIP.
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If unsure, say N.
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To compile this driver as a module, choose M here: the
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module will be called xlnx_vcu.
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config COMMON_CLK_XLNX_CLKWZRD
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tristate "Xilinx Clocking Wizard"
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depends on OF
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depends on HAS_IOMEM
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help
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Support for the Xilinx Clocking Wizard IP core clock generator.
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Adds support for clocking wizard and compatible.
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This driver supports the Xilinx clocking wizard programmable clock
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synthesizer. The number of output is configurable in the design.
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If unsure, say N.
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