Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
34 lines
978 B
C
34 lines
978 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
|
/*
|
|
* tps51632-regulator.h -- TPS51632 regulator
|
|
*
|
|
* Interface for regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down
|
|
* Driverless Controller with serial VID control and DVFS.
|
|
*
|
|
* Copyright (C) 2012 NVIDIA Corporation
|
|
|
|
* Author: Laxman Dewangan <ldewangan@nvidia.com>
|
|
*/
|
|
|
|
#ifndef __LINUX_REGULATOR_TPS51632_H
|
|
#define __LINUX_REGULATOR_TPS51632_H
|
|
|
|
/*
|
|
* struct tps51632_regulator_platform_data - tps51632 regulator platform data.
|
|
*
|
|
* @reg_init_data: The regulator init data.
|
|
* @enable_pwm_dvfs: Enable PWM DVFS or not.
|
|
* @dvfs_step_20mV: Step for DVFS is 20mV or 10mV.
|
|
* @max_voltage_uV: Maximum possible voltage in PWM-DVFS mode.
|
|
* @base_voltage_uV: Base voltage when PWM-DVFS enabled.
|
|
*/
|
|
struct tps51632_regulator_platform_data {
|
|
struct regulator_init_data *reg_init_data;
|
|
bool enable_pwm_dvfs;
|
|
bool dvfs_step_20mV;
|
|
int max_voltage_uV;
|
|
int base_voltage_uV;
|
|
};
|
|
|
|
#endif /* __LINUX_REGULATOR_TPS51632_H */
|