Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
48 lines
1.4 KiB
C
48 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-1.0+ */
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/*
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* Industrial Computer Source WDT500/501 driver
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*
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* (c) Copyright 1995 CymruNET Ltd
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* Innovation Centre
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* Singleton Park
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* Swansea
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* Wales
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* UK
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* SA2 8PP
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*
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* http://www.cymru.net
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*
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* Release 0.04.
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*/
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#define WDT_COUNT0 (io+0)
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#define WDT_COUNT1 (io+1)
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#define WDT_COUNT2 (io+2)
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#define WDT_CR (io+3)
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#define WDT_SR (io+4) /* Start buzzer on PCI write */
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#define WDT_RT (io+5) /* Stop buzzer on PCI write */
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#define WDT_BUZZER (io+6) /* PCI only: rd=disable, wr=enable */
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#define WDT_DC (io+7)
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/* The following are only on the PCI card, they're outside of I/O space on
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* the ISA card: */
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#define WDT_CLOCK (io+12) /* COUNT2: rd=16.67MHz, wr=2.0833MHz */
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/* inverted opto isolated reset output: */
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#define WDT_OPTONOTRST (io+13) /* wr=enable, rd=disable */
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/* opto isolated reset output: */
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#define WDT_OPTORST (io+14) /* wr=enable, rd=disable */
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/* programmable outputs: */
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#define WDT_PROGOUT (io+15) /* wr=enable, rd=disable */
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/* FAN 501 500 */
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#define WDC_SR_WCCR 1 /* Active low */ /* X X X */
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#define WDC_SR_TGOOD 2 /* X X - */
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#define WDC_SR_ISOI0 4 /* X X X */
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#define WDC_SR_ISII1 8 /* X X X */
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#define WDC_SR_FANGOOD 16 /* X - - */
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#define WDC_SR_PSUOVER 32 /* Active low */ /* X X - */
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#define WDC_SR_PSUUNDR 64 /* Active low */ /* X X - */
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#define WDC_SR_IRQ 128 /* Active low */ /* X X X */
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