Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
31 lines
694 B
C
31 lines
694 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022, NVIDIA Corporation.
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*/
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#ifndef DRM_TEGRA_RISCV_H
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#define DRM_TEGRA_RISCV_H
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struct tegra_drm_riscv_descriptor {
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u32 manifest_offset;
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u32 code_offset;
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u32 code_size;
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u32 data_offset;
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u32 data_size;
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};
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struct tegra_drm_riscv {
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/* User initializes */
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struct device *dev;
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void __iomem *regs;
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struct tegra_drm_riscv_descriptor bl_desc;
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struct tegra_drm_riscv_descriptor os_desc;
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};
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int tegra_drm_riscv_read_descriptors(struct tegra_drm_riscv *riscv);
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int tegra_drm_riscv_boot_bootrom(struct tegra_drm_riscv *riscv, phys_addr_t image_address,
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u32 gscid, const struct tegra_drm_riscv_descriptor *desc);
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#endif
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