Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
34 lines
1014 B
Plaintext
34 lines
1014 B
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config PINCTRL_ASPEED
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bool
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depends on (ARCH_ASPEED || COMPILE_TEST) && OF
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select MFD_SYSCON
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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select REGMAP_MMIO
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config PINCTRL_ASPEED_G4
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bool "Aspeed G4 SoC pin control"
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depends on (MACH_ASPEED_G4 || COMPILE_TEST) && OF
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select PINCTRL_ASPEED
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help
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Say Y here to enable pin controller support for Aspeed's 4th
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generation SoCs. GPIO is provided by a separate GPIO driver.
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config PINCTRL_ASPEED_G5
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bool "Aspeed G5 SoC pin control"
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depends on (MACH_ASPEED_G5 || COMPILE_TEST) && OF
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select PINCTRL_ASPEED
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help
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Say Y here to enable pin controller support for Aspeed's 5th
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generation SoCs. GPIO is provided by a separate GPIO driver.
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config PINCTRL_ASPEED_G6
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bool "Aspeed G6 SoC pin control"
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depends on (MACH_ASPEED_G6 || COMPILE_TEST) && OF
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select PINCTRL_ASPEED
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help
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Say Y here to enable pin controller support for Aspeed's 6th
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generation SoCs. GPIO is provided by a separate GPIO driver.
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