Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
66 lines
2.4 KiB
C
66 lines
2.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __GRLIB_APBUART_H__
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#define __GRLIB_APBUART_H__
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#include <asm/io.h>
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#define UART_NR 8
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static int grlib_apbuart_port_nr;
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struct grlib_apbuart_regs_map {
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u32 data;
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u32 status;
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u32 ctrl;
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u32 scaler;
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};
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struct amba_prom_registers {
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unsigned int phys_addr;
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unsigned int reg_size;
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};
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/*
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* The following defines the bits in the APBUART Status Registers.
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*/
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#define UART_STATUS_DR 0x00000001 /* Data Ready */
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#define UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
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#define UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
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#define UART_STATUS_BR 0x00000008 /* Break Error */
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#define UART_STATUS_OE 0x00000010 /* RX Overrun Error */
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#define UART_STATUS_PE 0x00000020 /* RX Parity Error */
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#define UART_STATUS_FE 0x00000040 /* RX Framing Error */
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#define UART_STATUS_ERR 0x00000078 /* Error Mask */
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/*
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* The following defines the bits in the APBUART Ctrl Registers.
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*/
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#define UART_CTRL_RE 0x00000001 /* Receiver enable */
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#define UART_CTRL_TE 0x00000002 /* Transmitter enable */
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#define UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
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#define UART_CTRL_TI 0x00000008 /* Transmitter irq */
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#define UART_CTRL_PS 0x00000010 /* Parity select */
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#define UART_CTRL_PE 0x00000020 /* Parity enable */
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#define UART_CTRL_FL 0x00000040 /* Flow control enable */
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#define UART_CTRL_LB 0x00000080 /* Loopback enable */
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#define APBBASE(port) ((struct grlib_apbuart_regs_map *)((port)->membase))
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#define APBBASE_DATA_P(port) (&(APBBASE(port)->data))
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#define APBBASE_STATUS_P(port) (&(APBBASE(port)->status))
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#define APBBASE_CTRL_P(port) (&(APBBASE(port)->ctrl))
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#define APBBASE_SCALAR_P(port) (&(APBBASE(port)->scaler))
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#define UART_GET_CHAR(port) (__raw_readl(APBBASE_DATA_P(port)))
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#define UART_PUT_CHAR(port, v) (__raw_writel(v, APBBASE_DATA_P(port)))
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#define UART_GET_STATUS(port) (__raw_readl(APBBASE_STATUS_P(port)))
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#define UART_PUT_STATUS(port, v)(__raw_writel(v, APBBASE_STATUS_P(port)))
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#define UART_GET_CTRL(port) (__raw_readl(APBBASE_CTRL_P(port)))
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#define UART_PUT_CTRL(port, v) (__raw_writel(v, APBBASE_CTRL_P(port)))
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#define UART_GET_SCAL(port) (__raw_readl(APBBASE_SCALAR_P(port)))
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#define UART_PUT_SCAL(port, v) (__raw_writel(v, APBBASE_SCALAR_P(port)))
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#define UART_RX_DATA(s) (((s) & UART_STATUS_DR) != 0)
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#define UART_TX_READY(s) (((s) & UART_STATUS_THE) != 0)
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#endif /* __GRLIB_APBUART_H__ */
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