Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
26 lines
624 B
C
26 lines
624 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Information for the Marvell Armada MMP camera
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*/
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#include <media/v4l2-mediabus.h>
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enum dphy3_algo {
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DPHY3_ALGO_DEFAULT = 0,
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DPHY3_ALGO_PXA910,
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DPHY3_ALGO_PXA2128
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};
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struct mmp_camera_platform_data {
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enum v4l2_mbus_type bus_type;
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int mclk_src; /* which clock source the MCLK derives from */
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int mclk_div; /* Clock Divider Value for MCLK */
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/*
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* MIPI support
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*/
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int dphy[3]; /* DPHY: CSI2_DPHY3, CSI2_DPHY5, CSI2_DPHY6 */
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enum dphy3_algo dphy3_algo; /* algos for calculate CSI2_DPHY3 */
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int lane; /* ccic used lane number; 0 means DVP mode */
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int lane_clk;
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};
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