Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
51 lines
1.1 KiB
YAML
51 lines
1.1 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/clock/mediatek,mt2701-hifsys.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: MediaTek HIFSYS clock and reset controller
|
|
|
|
description:
|
|
The MediaTek HIFSYS controller provides various clocks and reset outputs to
|
|
the system.
|
|
|
|
maintainers:
|
|
- Matthias Brugger <matthias.bgg@gmail.com>
|
|
|
|
properties:
|
|
compatible:
|
|
oneOf:
|
|
- enum:
|
|
- mediatek,mt2701-hifsys
|
|
- mediatek,mt7622-hifsys
|
|
- items:
|
|
- enum:
|
|
- mediatek,mt7623-hifsys
|
|
- const: mediatek,mt2701-hifsys
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
"#clock-cells":
|
|
const: 1
|
|
description: The available clocks are defined in dt-bindings/clock/mt*-clk.h
|
|
|
|
"#reset-cells":
|
|
const: 1
|
|
|
|
required:
|
|
- reg
|
|
- "#clock-cells"
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
clock-controller@1a000000 {
|
|
compatible = "mediatek,mt2701-hifsys";
|
|
reg = <0x1a000000 0x1000>;
|
|
#clock-cells = <1>;
|
|
#reset-cells = <1>;
|
|
};
|