Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
60 lines
1.8 KiB
C
60 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2018 BayLibre SAS
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* Author: Bartosz Golaszewski <bgolaszewski@baylibre.com>
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*
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* Common definitions for MAXIM 77650/77651 charger/power-supply.
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*/
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#ifndef MAX77650_H
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#define MAX77650_H
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#include <linux/bits.h>
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#define MAX77650_REG_INT_GLBL 0x00
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#define MAX77650_REG_INT_CHG 0x01
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#define MAX77650_REG_STAT_CHG_A 0x02
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#define MAX77650_REG_STAT_CHG_B 0x03
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#define MAX77650_REG_ERCFLAG 0x04
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#define MAX77650_REG_STAT_GLBL 0x05
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#define MAX77650_REG_INTM_GLBL 0x06
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#define MAX77650_REG_INTM_CHG 0x07
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#define MAX77650_REG_CNFG_GLBL 0x10
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#define MAX77650_REG_CID 0x11
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#define MAX77650_REG_CNFG_GPIO 0x12
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#define MAX77650_REG_CNFG_CHG_A 0x18
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#define MAX77650_REG_CNFG_CHG_B 0x19
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#define MAX77650_REG_CNFG_CHG_C 0x1a
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#define MAX77650_REG_CNFG_CHG_D 0x1b
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#define MAX77650_REG_CNFG_CHG_E 0x1c
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#define MAX77650_REG_CNFG_CHG_F 0x1d
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#define MAX77650_REG_CNFG_CHG_G 0x1e
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#define MAX77650_REG_CNFG_CHG_H 0x1f
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#define MAX77650_REG_CNFG_CHG_I 0x20
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#define MAX77650_REG_CNFG_SBB_TOP 0x28
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#define MAX77650_REG_CNFG_SBB0_A 0x29
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#define MAX77650_REG_CNFG_SBB0_B 0x2a
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#define MAX77650_REG_CNFG_SBB1_A 0x2b
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#define MAX77650_REG_CNFG_SBB1_B 0x2c
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#define MAX77650_REG_CNFG_SBB2_A 0x2d
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#define MAX77650_REG_CNFG_SBB2_B 0x2e
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#define MAX77650_REG_CNFG_LDO_A 0x38
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#define MAX77650_REG_CNFG_LDO_B 0x39
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#define MAX77650_REG_CNFG_LED0_A 0x40
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#define MAX77650_REG_CNFG_LED1_A 0x41
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#define MAX77650_REG_CNFG_LED2_A 0x42
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#define MAX77650_REG_CNFG_LED0_B 0x43
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#define MAX77650_REG_CNFG_LED1_B 0x44
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#define MAX77650_REG_CNFG_LED2_B 0x45
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#define MAX77650_REG_CNFG_LED_TOP 0x46
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#define MAX77650_CID_MASK GENMASK(3, 0)
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#define MAX77650_CID_BITS(_reg) (_reg & MAX77650_CID_MASK)
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#define MAX77650_CID_77650A 0x03
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#define MAX77650_CID_77650C 0x0a
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#define MAX77650_CID_77651A 0x06
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#define MAX77650_CID_77651B 0x08
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#endif /* MAX77650_H */
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