Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
24 lines
936 B
C
24 lines
936 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2022, Google LLC.
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*/
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#ifndef SELFTEST_KVM_MCE_H
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#define SELFTEST_KVM_MCE_H
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#define MCG_CTL_P BIT_ULL(8) /* MCG_CTL register available */
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#define MCG_SER_P BIT_ULL(24) /* MCA recovery/new status bits */
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#define MCG_LMCE_P BIT_ULL(27) /* Local machine check supported */
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#define MCG_CMCI_P BIT_ULL(10) /* CMCI supported */
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#define KVM_MAX_MCE_BANKS 32
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#define MCG_CAP_BANKS_MASK 0xff /* Bit 0-7 of the MCG_CAP register are #banks */
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#define MCI_STATUS_VAL (1ULL << 63) /* valid error */
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#define MCI_STATUS_UC (1ULL << 61) /* uncorrected error */
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#define MCI_STATUS_EN (1ULL << 60) /* error enabled */
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#define MCI_STATUS_MISCV (1ULL << 59) /* misc error reg. valid */
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#define MCI_STATUS_ADDRV (1ULL << 58) /* addr reg. valid */
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#define MCM_ADDR_PHYS 2 /* physical address */
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#define MCI_CTL2_CMCI_EN BIT_ULL(30)
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#endif /* SELFTEST_KVM_MCE_H */
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