Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
59 lines
1.6 KiB
C
59 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __DTS_MARVELL_PXA910_CLOCK_H
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#define __DTS_MARVELL_PXA910_CLOCK_H
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/* fixed clocks and plls */
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#define PXA910_CLK_CLK32 1
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#define PXA910_CLK_VCTCXO 2
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#define PXA910_CLK_PLL1 3
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#define PXA910_CLK_PLL1_2 8
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#define PXA910_CLK_PLL1_4 9
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#define PXA910_CLK_PLL1_8 10
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#define PXA910_CLK_PLL1_16 11
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#define PXA910_CLK_PLL1_6 12
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#define PXA910_CLK_PLL1_12 13
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#define PXA910_CLK_PLL1_24 14
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#define PXA910_CLK_PLL1_48 15
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#define PXA910_CLK_PLL1_96 16
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#define PXA910_CLK_PLL1_13 17
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#define PXA910_CLK_PLL1_13_1_5 18
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#define PXA910_CLK_PLL1_2_1_5 19
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#define PXA910_CLK_PLL1_3_16 20
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#define PXA910_CLK_PLL1_192 21
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#define PXA910_CLK_UART_PLL 27
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#define PXA910_CLK_USB_PLL 28
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/* apb peripherals */
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#define PXA910_CLK_TWSI0 60
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#define PXA910_CLK_TWSI1 61
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#define PXA910_CLK_TWSI2 62
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#define PXA910_CLK_TWSI3 63
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#define PXA910_CLK_GPIO 64
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#define PXA910_CLK_KPC 65
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#define PXA910_CLK_RTC 66
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#define PXA910_CLK_PWM0 67
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#define PXA910_CLK_PWM1 68
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#define PXA910_CLK_PWM2 69
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#define PXA910_CLK_PWM3 70
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#define PXA910_CLK_UART0 71
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#define PXA910_CLK_UART1 72
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#define PXA910_CLK_UART2 73
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#define PXA910_CLK_SSP0 74
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#define PXA910_CLK_SSP1 75
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#define PXA910_CLK_TIMER0 76
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#define PXA910_CLK_TIMER1 77
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/* axi peripherals */
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#define PXA910_CLK_DFC 100
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#define PXA910_CLK_SDH0 101
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#define PXA910_CLK_SDH1 102
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#define PXA910_CLK_SDH2 103
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#define PXA910_CLK_USB 104
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#define PXA910_CLK_SPH 105
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#define PXA910_CLK_DISP0 106
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#define PXA910_CLK_CCIC0 107
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#define PXA910_CLK_CCIC0_PHY 108
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#define PXA910_CLK_CCIC0_SPHY 109
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#endif
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