Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
44 lines
1.3 KiB
Plaintext
44 lines
1.3 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
|
|
|
|
menu "DAMON Samples"
|
|
|
|
config SAMPLE_DAMON_WSSE
|
|
bool "DAMON sample module for working set size estimation"
|
|
depends on DAMON && DAMON_VADDR
|
|
help
|
|
This builds DAMON sample module for working set size estimation.
|
|
|
|
The module receives a pid, monitor access to the virtual address
|
|
space of the process, estimate working set size of the process, and
|
|
repeatedly prints the size on the kernel log.
|
|
|
|
If unsure, say N.
|
|
|
|
config SAMPLE_DAMON_PRCL
|
|
bool "DAMON sample module for access-aware proactive reclamation"
|
|
depends on DAMON && DAMON_VADDR
|
|
help
|
|
This builds DAMON sample module for access-aware proactive
|
|
reclamation.
|
|
|
|
The module receives a pid, monitor access to the virtual address
|
|
space of the process, find memory regions that not accessed, and
|
|
proactively reclaim the regions.
|
|
|
|
If unsure, say N.
|
|
|
|
config SAMPLE_DAMON_MTIER
|
|
bool "DAMON sample module for memory tiering"
|
|
depends on DAMON && DAMON_PADDR
|
|
help
|
|
Thps builds DAMON sample module for memory tierign.
|
|
|
|
The module assumes the system is constructed with two NUMA nodes,
|
|
which seems as local and remote nodes to all CPUs. For example,
|
|
node0 is for DDR5 DRAMs connected via DIMM, while node1 is for DDR4
|
|
DRAMs connected via CXL.
|
|
|
|
If unsure, say N.
|
|
|
|
endmenu
|