Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
19 lines
485 B
C
19 lines
485 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_CACHEINFO_H
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#define _ASM_X86_CACHEINFO_H
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/* Kernel controls MTRR and/or PAT MSRs. */
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extern unsigned int memory_caching_control;
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#define CACHE_MTRR 0x01
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#define CACHE_PAT 0x02
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void cache_disable(void);
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void cache_enable(void);
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void set_cache_aps_delayed_init(bool val);
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bool get_cache_aps_delayed_init(void);
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void cache_bp_init(void);
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void cache_bp_restore(void);
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void cache_aps_init(void);
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#endif /* _ASM_X86_CACHEINFO_H */
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