Greg Kroah-Hartman
598cf27219
Link: https://lore.kernel.org/r/20260217200002.683975158@linuxfoundation.org Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Takeshi Ogasawara <takeshi.ogasawara@futuring-girl.com> Tested-by: Peter Schneider <pschneider1968@googlemail.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Salvatore Bonaccorso <carnil@debian.org> Tested-by: Brett A C Sheffield <bacs@librecast.net> Tested-by: Mark Brown <broonie@kernel.org> Tested-by: Luna Jernberg <droidbittin@gmail.com> Tested-by: Ronald Warsow <rwarsow@gmx.de> Tested-by: Justin M. Forbes <jforbes@fedoraproject.org> Tested-by: Ron Economos <re@w6rz.net> Tested-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
62 lines
894 B
ArmAsm
62 lines
894 B
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#include <linux/linkage.h>
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#include <abi/entry.h>
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.text
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/*
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* int csky_cmpxchg(int oldval, int newval, int *ptr)
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*
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* If *ptr != oldval && return 1,
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* else *ptr = newval return 0.
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*/
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ENTRY(csky_cmpxchg)
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USPTOKSP
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RD_MEH a3
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WR_MEH a3
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mfcr a3, epc
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addi a3, TRAP0_SIZE
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subi sp, 16
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stw a3, (sp, 0)
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mfcr a3, epsr
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stw a3, (sp, 4)
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mfcr a3, usp
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stw a3, (sp, 8)
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psrset ee
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#ifdef CONFIG_CPU_HAS_LDSTEX
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1:
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ldex a3, (a2)
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cmpne a0, a3
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bt16 2f
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mov a3, a1
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stex a3, (a2)
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bez a3, 1b
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2:
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sync.is
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#else
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GLOBAL(csky_cmpxchg_ldw)
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ldw a3, (a2)
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cmpne a0, a3
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bt16 3f
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GLOBAL(csky_cmpxchg_stw)
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stw a1, (a2)
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3:
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#endif
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mvc a0
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ldw a3, (sp, 0)
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mtcr a3, epc
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ldw a3, (sp, 4)
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mtcr a3, epsr
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ldw a3, (sp, 8)
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mtcr a3, usp
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addi sp, 16
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KSPTOUSP
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rte
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END(csky_cmpxchg)
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